11 #if FW_ENABLE_TEXT_LOGGING
33 this->m_CycleIn_InputPort[port].
init();
38 this->m_CycleIn_InputPort[port].
setPortNum(port);
40 #if FW_OBJECT_NAMES == 1
55 this->m_CycleIn_InputPort[port].setObjName(portName);
65 this->m_Time_OutputPort[port].
init();
67 #if FW_OBJECT_NAMES == 1
82 this->m_Time_OutputPort[port].setObjName(portName);
92 this->m_Tlm_OutputPort[port].
init();
94 #if FW_OBJECT_NAMES == 1
109 this->m_Tlm_OutputPort[port].setObjName(portName);
119 this->m_RateGroupMemberOut_OutputPort[port].
init();
121 #if FW_OBJECT_NAMES == 1
136 this->m_RateGroupMemberOut_OutputPort[port].setObjName(portName);
153 return &this->m_CycleIn_InputPort[portNum];
171 this->m_Time_OutputPort[portNum].
addCallPort(port);
203 this->m_RateGroupMemberOut_OutputPort[portNum].
addCallPort(port);
206 #if FW_PORT_SERIALIZATION
215 Fw::InputSerializePort* port
223 this->m_Time_OutputPort[portNum].registerSerialPort(port);
229 Fw::InputSerializePort* port
237 this->m_Tlm_OutputPort[portNum].registerSerialPort(port);
242 #if FW_PORT_SERIALIZATION
251 Fw::InputSerializePort* port
259 this->m_RateGroupMemberOut_OutputPort[portNum].registerSerialPort(port);
270 Fw::PassiveComponentBase(compName)
273 this->m_first_update_MaxCycleTime =
true;
274 this->m_last_MaxCycleTime = 0;
331 return this->m_Time_OutputPort[portNum].
isConnected();
342 return this->m_Tlm_OutputPort[portNum].
isConnected();
357 return this->m_RateGroupMemberOut_OutputPort[portNum].
isConnected();
399 this->m_RateGroupMemberOut_OutputPort[portNum].
invoke(
415 if (not this->m_first_update_MaxCycleTime) {
417 if (arg == this->m_last_MaxCycleTime) {
421 this->m_last_MaxCycleTime = arg;
425 this->m_first_update_MaxCycleTime =
false;
426 this->m_last_MaxCycleTime = arg;
429 if (this->m_Tlm_OutputPort[0].isConnected()) {
431 this->m_Time_OutputPort[0].isConnected() &&
434 this->m_Time_OutputPort[0].
invoke(_tlmTime);
448 this->m_Tlm_OutputPort[0].
invoke(
462 if (this->m_Tlm_OutputPort[0].isConnected()) {
464 this->m_Time_OutputPort[0].isConnected() &&
467 this->m_Time_OutputPort[0].
invoke(_tlmTime);
481 this->m_Tlm_OutputPort[0].
invoke(
495 if (this->m_Tlm_OutputPort[0].isConnected()) {
497 this->m_Time_OutputPort[0].isConnected() &&
500 this->m_Time_OutputPort[0].
invoke(_tlmTime);
514 this->m_Tlm_OutputPort[0].
invoke(
529 if (this->m_Time_OutputPort[0].isConnected()) {
531 this->m_Time_OutputPort[0].
invoke(_time);
543 void PassiveRateGroupComponentBase ::
PlatformIntType NATIVE_INT_TYPE
#define FW_NUM_ARRAY_ELEMENTS(a)
number of elements in an array
PlatformUIntType NATIVE_UINT_TYPE
int PlatformIntType
DefaultTypes.hpp provides fallback defaults for the platform types.
#define PRI_PlatformIntType
@ TB_NONE
No time base has been established.
PlatformAssertArgType FwAssertArgType
#define FW_OBJ_NAME_MAX_SIZE
Size of object name (if object names enabled). AC Limits to 80, truncation occurs above 80.
void init()
Object initializer.
void addCallPort(InputTimePort *callPort)
Register an input port.
void invoke(Fw::Time &time)
Invoke a port interface.
void init()
Initialization function.
void addCallPort(InputTlmPort *callPort)
Register an input port.
void init()
Initialization function.
void invoke(FwChanIdType id, Fw::Time &timeTag, Fw::TlmBuffer &val)
Invoke a port interface.
SerializeStatus serialize(U8 val)
serialize 8-bit unsigned int
void invoke(NATIVE_UINT_TYPE context)
Invoke a port interface.
void init()
Initialization function.
void addCallPort(InputSchedPort *callPort)
Register an input port.
Auto-generated base for PassiveRateGroup component.
void set_Tlm_OutputPort(NATIVE_INT_TYPE portNum, Fw::InputTlmPort *port)
Connect port to Tlm[portNum].
PassiveRateGroupComponentBase(const char *compName="")
Construct PassiveRateGroupComponentBase object.
void tlmWrite_CycleTime(U32 arg, Fw::Time _tlmTime=Fw::Time())
void set_Time_OutputPort(NATIVE_INT_TYPE portNum, Fw::InputTimePort *port)
Connect port to Time[portNum].
void RateGroupMemberOut_out(NATIVE_INT_TYPE portNum, NATIVE_UINT_TYPE context)
Invoke output port RateGroupMemberOut.
void CycleIn_handlerBase(NATIVE_INT_TYPE portNum, Svc::TimerVal &cycleStart)
Handler base-class function for input port CycleIn.
bool isConnected_Tlm_OutputPort(NATIVE_INT_TYPE portNum)
virtual ~PassiveRateGroupComponentBase()
Destroy PassiveRateGroupComponentBase object.
NATIVE_INT_TYPE getNum_Time_OutputPorts() const
NATIVE_INT_TYPE getNum_RateGroupMemberOut_OutputPorts() const
NATIVE_INT_TYPE getNum_CycleIn_InputPorts() const
void tlmWrite_CycleCount(U32 arg, Fw::Time _tlmTime=Fw::Time())
Svc::InputCyclePort * get_CycleIn_InputPort(NATIVE_INT_TYPE portNum)
@ CHANNELID_MAXCYCLETIME
Channel ID for MaxCycleTime.
@ CHANNELID_CYCLETIME
Channel ID for CycleTime.
@ CHANNELID_CYCLECOUNT
Channel ID for CycleCount.
NATIVE_INT_TYPE getNum_Tlm_OutputPorts() const
bool isConnected_Time_OutputPort(NATIVE_INT_TYPE portNum)
void tlmWrite_MaxCycleTime(U32 arg, Fw::Time _tlmTime=Fw::Time())
bool isConnected_RateGroupMemberOut_OutputPort(NATIVE_INT_TYPE portNum)
void set_RateGroupMemberOut_OutputPort(NATIVE_INT_TYPE portNum, Svc::InputSchedPort *port)
Connect port to RateGroupMemberOut[portNum].
virtual void CycleIn_handler(NATIVE_INT_TYPE portNum, Svc::TimerVal &cycleStart)=0
Handler for input port CycleIn.
Serializable class for carrying timer values.
SerializeStatus
forward declaration for string
@ FW_SERIALIZE_OK
Serialization/Deserialization operation was successful.